Selected Engineering Projects
A collection of systems software, security research, hardware utilities, and spatial applications. Each project includes technical specifications, live interactive components, and open-source GitHub repositories.
Video Steganography Engine
Engineered a low-latency video steganography pipeline in C++ and OpenCV that embeds encrypted payload data across video frames without visible perceptual distortion. Features dynamic bit-plane slicing, spatial residual minimization, and SHA-256 HMAC payload authentication.
Video Steganography Bit-Plane & Payload Inspector
Real-time LSB substitution analysis, spatial residual diffs, and SHA-256 HMAC integrity
- •Sub-2ms per-frame embedding latency optimized for 1080p60 uncompressed video streams
- •Dynamic LSB bit-plane selection (1 to 3 bits/channel) preserving high PSNR (> 51 dB)
- •ChaCha20-Poly1305 payload encryption with frame sequence nonce verification
- •Robust against statistical chi-square steganalysis via pseudorandom pixel dispersal
Lebanon Dark-Sky GIS Observatory
A geospatial analysis suite that processes satellite radiance datasets (NOAA VIIRS Day/Night Band) and calibrated ground-truth Sky Quality Meter (SQM) readings. Maps light pollution corridors and astronomical seeing quality across high-altitude summits in Mount Lebanon and North Lebanon.
Lebanon Dark-Sky GIS Observatory & Radiance Dataset
Spatial photometric analysis based on VIIRS DNB night radiance and SQM field sensors
Qurnat as Sawda' Peak
Highest point in the Levant. Exceptional atmospheric transparency, negligible aerosol scattering.
- •Calculates zenith radiance (nW/cm²/sr) and Bortle darkness classes across 8 key Lebanese observatories
- •Analyzes cloud inversion thresholds at high elevations (Qurnat as Sawda 3,088m, Sannine 2,200m)
- •Geospatial vector processing pipelines built with Python, QGIS, PostGIS, and MapLibre GL
- •Identifies dark-sky preservation corridors with up to 98% contrast vs. coastal light domes
Hardware & Resistor Color-Code Calculator
An interactive engineering calculator designed for electronics prototyping and laboratory bench work. Accurately decodes 4-band and 5-band resistor standard color codes, computes precision tolerance bounds, and maps values to standard E24/E96 component series.
Resistor Color-Code Decoder & Physics Utility
Real-time IEC 60062 standard resistance & tolerance calculation
- •Full IEC 60062 compliance for 4-band standard and 5-band high-precision resistor packages
- •Dynamic SVG graphic updates in real-time with authentic component geometry and color rendering
- •Immediate tolerance margin envelope calculation (Min Ω to Max Ω)
- •Preloaded with laboratory circuit presets (I2C pull-ups, LED current limits, op-amp feedback)
Audio Signal Processing & Harmonic Synthesizer
Interactive signal synthesis and harmonic analysis utility that models audio oscillators (Sine, Square, Triangle, Sawtooth). Visualizes live waveforms on an animated canvas oscilloscope and computes real-time FFT spectral distribution, harmonic distortion, and musical pitch notation.
Signal Frequency Synthesizer & Harmonic Analyzer
Real-time continuous time Fourier transform (CTFT) & musical pitch mapping
- •Real-time continuous audio synthesis algorithm with 60 FPS HTML5 canvas oscilloscope
- •Fast Fourier Transform (FFT) harmonic spectral density decomposition
- •Musical equal-temperament pitch mapping (A4 = 440 Hz standard)
- •Period (T), angular velocity (ω), and Nyquist-Shannon sampling frequency verification
5-Stage Pipelined RV32I Processor Core
Constructed a complete 32-bit RISC-V (RV32I) microprocessor architecture from gate-level primitives in SystemVerilog. Features a classic 5-stage pipeline (IF, ID, EX, MEM, WB), full data forwarding units, branch hazard stalls, and memory-mapped I/O interfaces.
- •Implements base RV32I integer instruction set with custom ALU and branch comparator
- •Hazard detection unit resolving Read-After-Write (RAW) data dependencies with zero penalty when forwardable
- •Synthesized and verified on Xilinx Artix-7 FPGA board with ModelSim testbenches
- •Benchmarked with bare-metal C applications compiled via riscv32-unknown-elf-gcc
Resilient LoRa IoT Telemetry Mesh
Developed firmware for STM32 and ESP32 microcontroller nodes communicating over 868MHz sub-GHz LoRa radio. Designed packet routing algorithms with adaptive transmission power, deep sleep power gating, and link-layer AES encryption for long-range environmental telemetry.
- •Dynamic sleep duty cycle achieving < 15 µA quiescent current for 12+ month battery longevity
- •Multi-hop packet forwarding protocol operating reliably over a 12 km rural radius
- •Link-layer payload encryption using AES-128 in Galois/Counter Mode (GCM)
- •Sensor interfaces for atmospheric pressure, ambient lux, temperature, and battery telemetry
Explore Complete Source Code & Commit History
All engineering repositories, benchmark suites, HDL testbenches, and GIS datasets are publicly available on GitHub under permissive licenses.