SA
Safi AridiCE @ LAU · IEEE Member
Archive // Engineering Deep Dives

Selected Engineering Projects

A collection of systems software, security research, hardware utilities, and spatial applications. Each project includes technical specifications, live interactive components, and open-source GitHub repositories.

Systems & Security2025 – 2026
REF: video-stego

Video Steganography Engine

Data payload embedding in video streams via spatial LSB & DCT perturbation

Engineered a low-latency video steganography pipeline in C++ and OpenCV that embeds encrypted payload data across video frames without visible perceptual distortion. Features dynamic bit-plane slicing, spatial residual minimization, and SHA-256 HMAC payload authentication.

Video Steganography Bit-Plane & Payload Inspector

Real-time LSB substitution analysis, spatial residual diffs, and SHA-256 HMAC integrity

Frame:
I-Frame (Keyframe)
Payload Injection Density:1 bit/channel
AES-256 / SHA-256: ARMED
Payload encrypted via ChaCha20-Poly1305 with frame sequence nonce.
Fidelity & Capacity Metrics:
Frame Payload Capacity:759.4 KB / frame
PSNR (Fidelity):52.40 dB (>48dB = pristine)
SSIM (Structure):0.9999
Insertion Latency:1.84 ms (Zero frame drop)
Technical Architecture Specifications:
  • Sub-2ms per-frame embedding latency optimized for 1080p60 uncompressed video streams
  • Dynamic LSB bit-plane selection (1 to 3 bits/channel) preserving high PSNR (> 51 dB)
  • ChaCha20-Poly1305 payload encryption with frame sequence nonce verification
  • Robust against statistical chi-square steganalysis via pseudorandom pixel dispersal
Performance Benchmark:PSNR > 51.4 dB · 1.84 ms Latency · Zero Parity Loss
C++
OpenCV
Cryptography
Bit-Plane Slicing
DCT
FFmpeg
Data & GIS2024 – 2025
REF: dark-sky-gis

Lebanon Dark-Sky GIS Observatory

Light pollution mapping & astronomical data visualization across Lebanese summits

A geospatial analysis suite that processes satellite radiance datasets (NOAA VIIRS Day/Night Band) and calibrated ground-truth Sky Quality Meter (SQM) readings. Maps light pollution corridors and astronomical seeing quality across high-altitude summits in Mount Lebanon and North Lebanon.

Lebanon Dark-Sky GIS Observatory & Radiance Dataset

Spatial photometric analysis based on VIIRS DNB night radiance and SQM field sensors

Filter Bortle:
Qurnat as Sawda' Peak
North Lebanon (Mount Makmel) · 34°18'05"N 36°06'54"E
Astro Quality Score
98/100

Highest point in the Levant. Exceptional atmospheric transparency, negligible aerosol scattering.

Zenith Radiance
0.04 nW/cm²/sr
Sky Brightness (SQM)
21.85 mag/arcsec²
Atmospheric Seeing
0.72" (FWHM)
Milky Way Core: High Detail
Zodiacal Light: Observable
Light Pollution Contrast vs Beirut Coastline:99.9% Darker
Technical Architecture Specifications:
  • Calculates zenith radiance (nW/cm²/sr) and Bortle darkness classes across 8 key Lebanese observatories
  • Analyzes cloud inversion thresholds at high elevations (Qurnat as Sawda 3,088m, Sannine 2,200m)
  • Geospatial vector processing pipelines built with Python, QGIS, PostGIS, and MapLibre GL
  • Identifies dark-sky preservation corridors with up to 98% contrast vs. coastal light domes
Performance Benchmark:21.85 mag/arcsec² peak SQM · 8 Mountain Summits · VIIRS Calibrated
Python
GIS / QGIS
MapLibre
PostGIS
VIIRS DNB
Photometry
Hardware & Physics2025
REF: hardware-physics

Hardware & Resistor Color-Code Calculator

Real-time IEC 60062 resistance decoder, tolerance bounds & circuit presets

An interactive engineering calculator designed for electronics prototyping and laboratory bench work. Accurately decodes 4-band and 5-band resistor standard color codes, computes precision tolerance bounds, and maps values to standard E24/E96 component series.

Resistor Color-Code Decoder & Physics Utility

Real-time IEC 60062 standard resistance & tolerance calculation

Nominal Resistance:
4.70 kΩ ±5%
Range: 4.46 kΩ4.93 kΩ
Standard: E24 / E96 Series
Common Laboratory Circuit Presets:
Technical Architecture Specifications:
  • Full IEC 60062 compliance for 4-band standard and 5-band high-precision resistor packages
  • Dynamic SVG graphic updates in real-time with authentic component geometry and color rendering
  • Immediate tolerance margin envelope calculation (Min Ω to Max Ω)
  • Preloaded with laboratory circuit presets (I2C pull-ups, LED current limits, op-amp feedback)
Performance Benchmark:0.05% Precision · E24/E96 Series · Instant Feedback
React
TypeScript
SVG Synthesis
Digital Electronics
IEC 60062
Hardware & Physics2024 – 2025
REF: signal-notation

Audio Signal Processing & Harmonic Synthesizer

Continuous-time Fourier transform (CTFT), oscilloscope waveforms & pitch mapping

Interactive signal synthesis and harmonic analysis utility that models audio oscillators (Sine, Square, Triangle, Sawtooth). Visualizes live waveforms on an animated canvas oscilloscope and computes real-time FFT spectral distribution, harmonic distortion, and musical pitch notation.

Signal Frequency Synthesizer & Harmonic Analyzer

Real-time continuous time Fourier transform (CTFT) & musical pitch mapping

CH1: 1.0 V/divTB: 2.27 ms/div
Frequency:440 Hz (A4)
Peak Amplitude (Vp):4.0 V
Harmonic Properties:
Wave Period (T):2.27 ms
Angular Speed (ω):2765 rad/s
Musical Notation:A4 (Equal Temp.)
Nyquist Sampling:880 Hz
Laboratory Frequencies:
Technical Architecture Specifications:
  • Real-time continuous audio synthesis algorithm with 60 FPS HTML5 canvas oscilloscope
  • Fast Fourier Transform (FFT) harmonic spectral density decomposition
  • Musical equal-temperament pitch mapping (A4 = 440 Hz standard)
  • Period (T), angular velocity (ω), and Nyquist-Shannon sampling frequency verification
Performance Benchmark:60 FPS Oscilloscope · FFT Decomposition · Equal Temp. Pitch
TypeScript
HTML5 Canvas
Audio DSP
Fourier Transforms
Harmonic Physics
Hardware & Physics2024
REF: riscv-core

5-Stage Pipelined RV32I Processor Core

Synthesizable 32-bit RISC-V microprocessor with hazard resolution and forwarding

Constructed a complete 32-bit RISC-V (RV32I) microprocessor architecture from gate-level primitives in SystemVerilog. Features a classic 5-stage pipeline (IF, ID, EX, MEM, WB), full data forwarding units, branch hazard stalls, and memory-mapped I/O interfaces.

Technical Architecture Specifications:
  • Implements base RV32I integer instruction set with custom ALU and branch comparator
  • Hazard detection unit resolving Read-After-Write (RAW) data dependencies with zero penalty when forwardable
  • Synthesized and verified on Xilinx Artix-7 FPGA board with ModelSim testbenches
  • Benchmarked with bare-metal C applications compiled via riscv32-unknown-elf-gcc
Performance Benchmark:1.14 IPC · 100 MHz Synthesized · Full RV32I Spec
SystemVerilog
RISC-V
Xilinx Vivado
ModelSim
FPGA
C / Assembly
Hardware & Physics2023 – 2024
REF: lora-telemetry

Resilient LoRa IoT Telemetry Mesh

Ultra-low-power environmental sensor nodes with AES-128 payload security

Developed firmware for STM32 and ESP32 microcontroller nodes communicating over 868MHz sub-GHz LoRa radio. Designed packet routing algorithms with adaptive transmission power, deep sleep power gating, and link-layer AES encryption for long-range environmental telemetry.

Technical Architecture Specifications:
  • Dynamic sleep duty cycle achieving < 15 µA quiescent current for 12+ month battery longevity
  • Multi-hop packet forwarding protocol operating reliably over a 12 km rural radius
  • Link-layer payload encryption using AES-128 in Galois/Counter Mode (GCM)
  • Sensor interfaces for atmospheric pressure, ambient lux, temperature, and battery telemetry
Performance Benchmark:12 km Range · 15 µA Sleep · AES-GCM Encrypted
Embedded C
STM32
ESP32
FreeRTOS
LoRaWAN
AES-128
GITHUB REPOSITORY HUB

Explore Complete Source Code & Commit History

All engineering repositories, benchmark suites, HDL testbenches, and GIS datasets are publicly available on GitHub under permissive licenses.